US Patents:
- Jie Yuan,
"Calibration method and architecture for both linear and nonlinear error in
pipelined analog-to-digital converters", US provisional patent
application, 2011
- Jie Yuan, Bing Liu, "Quantum-limited highly
linear CMOS detector for computer tomography", US patent application,
13/115,681, filed May 25, 2011
- Jie Yuan, Ho Yeung Chan, "Apparatus and
method for improving dynamic range and linearity of CMOS image sensor", US
patent application 12/697,061, pending, filed Jan. 29, 2010